Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
19-110 Freescale Semiconductor
9. When all of the configuration commands are transferred, EQADC_FISRn[CF0] is set. Refer to 
Section 19.3.2.8, “eQADC FIFO and Interrupt Status Registers 0–5 (EQADC_FISRn).” The 
eQADC generates an end of queue interrupt. The initialization procedure is complete.
Figure 19-64. Example of a Command Queue Configuring the On-Chip ADCs/External Device
19.5.1.2 Configuring eQADC for Applications
This section provides an example based on the applications in Table 19-56. The example describes how to 
configure multiple command queues to be used for those applications and provides a step-by-step 
procedure to configure the eQADC and the associated command queue structures. In the example, the 
“Fast hardware-triggered command queue,” described on the second row of Table 19-56, transfer its 
commands to ADC1; the conversion commands are executed by ADC1. The generated results are returned 
to RFIFO3 before being transferred to the result queues in the RAM by the eDMA.
NOTE
There is no fixed relationship between CFIFOs and RFIFOs with the same 
number. The results of commands being transferred through CFIFO1 can be 
returned to any RFIFO, regardless of its number. The destination of a result 
is determined by the MESSAGE_TAG field of the command that requested 
the result. Refer to Section 19.4.1.2, “Message Format in eQADC,” for 
details. 
Step One: Set up the command queues and result queues.
1. Load the RAM with configuration and conversion commands. Table 19-57 is an example of how 
to set commands for command queue 1 .
a) Each trigger event causes four commands to be executed. When the eQADC detects the pause 
bit asserted, it waits for another trigger to restart transferring commands from the CFIFO.
b) At the end of the command queue, the “EOQ” bit is asserted as shown in Table 19-57.
c) Results are returned to RFIFO3 as specified in the MESSAGE_TAG field of commands.
2. Reserve memory space for storing results.
Configuration Command to ADC0—Ex: Write ADC0_CR
Command Queue in
0x0
0x1
0x2
0x3
System Memory
Configuration Command to ADC2—Ex: Write to external device configuration register
Configuration Command to ADC0—Ex: Write ADC_TSCR
Configuration Command to ADC1—Ex: Write ADC1_CR
Command
Address