NXP Semiconductors MPC5566 - Etpu Channel N Configuration Register (Etpu_Cncr)

Enhanced Time Processing Unit (eTPU)
MPC5566 Microcontroller Reference Manual, Rev. 2
18-42 Freescale Semiconductor
where:
18.4.6.2 eTPU Channel n Configuration Register (ETPU_CnCR)
The ETPU_CnCR is a collection of the configuration bits related to an individual channel. Some of these
bits are mirrored from the global channel registers.
Address: Channel_Register_Base + 0x0000 Access: R/W
012345 6 789101112131415
R
CIE DTRE CPR
00
ETPD
1
ETCS
000
CFS
W
Reset000000 0 000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ODIS OPOL
000
CPBA
W
Reset000000 0 000000000
1
ETPD is not available on the MPC5566.
Figure 18-22. ETPU Channel n Configuration Register (ETPU_CnCR)
Table 18-25. ETPU_CnCR Field Descriptions
Field Description
0
CIE
Channel interrupt enable. This bit is mirrored from the ETPU_CIER
0 Disable interrupt for this channel.For more information, refer to the eTPU Reference Manual.
1 Enable interrupt for this channel.
1
DTRE
Channel data transfer request enable. This bit is mirrored from the ETPU_CDTRER.
0 Disable data transfer request for this channel.Refer to the eTPU Reference Manual for more information.
1 Enable data transfer request for this channel.
Channel_Register_Structure_Base_Address ETPU_Engine_Channel_Base channel_number 0x0000_0010×()+=
ETPU_Engine_Channel_Base ETPU_Base 0x0000_0400 ETPU A=() or 0x0000_0800 ETPU B=()()+=