NXP Semiconductors MPC5566 - Data Trace Start Address Registers 1 and 2 (Dtsan)

Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
25-44 Freescale Semiconductor
25.11.9 Data Trace Start Address Registers 1 and 2 (DTSAn)
The data trace start address registers define the start addresses for each trace channel.
25.11.10 Data Trace End Address Registers 1 and 2 (DTEAn)
The data trace end address registers define the end addresses for each trace channel.
7
RC1
Range control 1.
0 Condition trace on address within range
1 Condition trace on address outside of range
6
RC2
Range control 2
0 Condition trace on address within range
1 Condition trace on address outside of range
5–4 Reserved
3
DI1
Data access/instruction access trace 1.
0 Condition trace on data accesses
1 Condition trace on instruction accesses
2
DI2
Data access/instruction access trace 2
0 Condition trace on data accesses
1 Condition trace on instruction accesses
1–0 Reserved
Nexus Reg: 0x000E Access: R/W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Data Trace Start Address
W
Reset00000000000000000000000000000000
Figure 25-23. Data Trace Start Address Register 1 (DTSA1)
Nexus Reg: 0x000F Access: R/W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Data Trace Start Address
W
Reset00000000000000000000000000000000
Figure 25-24. Data Trace Start Address Register 2 (DTSA2)
Nexus Reg: 0x0012 Access: R/W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Data Trace End Address
W
Reset00000000000000000000000000000000
Figure 25-25. Data Trace End Address Register 1 (DTEA1)
Table 25-32. DTC Field Description (continued)
Field Description