Enhanced Time Processing Unit (eTPU)
MPC5566 Microcontroller Reference Manual, Rev. 2
18-40 Freescale Semiconductor
18.4.5.8 eTPU Channel Service Status Register (ETPU_CSSR)
ETPU_CSSR holds the current channel service status on whether it is being serviced or not. Only one bit
can be asserted in this register at a given time. When no channel is being serviced, the register read value
is 0x0000_0000. ETPU_CSSR is a read-only register. This register can be read during normal eTPU
operation for monitoring the scheduler activity. For more information on channels being serviced, refer to
the eTPU Reference Manual.
NOTE
The ETPU_CSSR is not an absolute indication of channel status. If more
than one source is requesting service, the asserted status bit only indicates
that one of the requests has been granted.
NOTE
Channel service status does not always reflect decoding of the CHAN
register, since the CHAN register can be changed by the service thread
microcode.
18.4.6 Channel Configuration and Control Registers
Each channel, for both eTPU engines, has a group of three registers used to control, configure and check
status of that channel as shown in Table 18-23.
Address: Base + 0x0000_0290 (eTPU A)
Address: Base + 0x0000_0294 (eTPU B)
Access: R/O
0123456789101112131415
R SS31 SS30 SS29 SS28 SS27 SS26 SS25 SS24 SS23 SS22 SS21 SS20 SS19 SS18 SS17 SS16
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R SS15 SS14 SS13 SS12 SS11 SS10 SS9 SS8 SS7 SS6 SS5 SS4 SS3 SS2 SS1 SS0
W
Reset0000000000000000
Figure 18-21. ETPU_CSSR Register
Table 18-22. ETPU_CSSR Field Descriptions
Field Description
0–31
SSn
Service status n. Indicates that channel n is currently being serviced. It is updated at the 1st microcycle of a time slot
transition.
0 channel n is not currently being serviced
1 channel n is currently being serviced
Refer to the eTPU Reference Manual for more information on time slot transitions.
To Next Page
Loading...
