NXP Semiconductors MPC5566 - Pad Configuration Register 118 (SIU_PCR118)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-65
6.3.1.80 Pad Configuration Register 118 (SIU_PCR118)
The SIU_PCR118 registers control the function, direction, and electrical attributes of
ETPUA[4]_ETPUA[16]_GPIO[118]. Only the output channel of ETPUA[16] is connected. Both the input
and output channels of ETPUA[4] are connected.
Figure 6-81. ETPUA[4]_ETPUA[16]_GPIO[118] Pad Configuration Register (SIU_PCR118)
Refer to Table 6-19 for bit field definitions. Table 6-80 lists the PA fields for
ETPUA[4]_ETPUA[16]_GPIO[118].
6.3.1.81 Pad Configuration Register 119 (SIU_PCR119)
The SIU_PCR119 registers control the function, direction, and electrical attributes of
ETPUA[5]_ETPUA[17]_GPIO[119]. Only the output channels of ETPUA[17] are connected. Both the
input and output channels of ETPUA[5] are connected.
Figure 6-82. ETPUA[5]_ETPUA[17]_GPIO[119] Pad Configuration Register (SIU_PCR119)
Address: Base + 0x012C Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for ETPUA[4], ETPUA[16] and GPIO[118] when configured as outputs.
When configured as ETPUA[16] the OBE bit has no effect.
IBE
2
2
The IBE bit must be set to 1 for ETPUA[4], ETPUA[16] and GPIO[118] when configured as inputs. When the pad is configured
as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the ETPUA[16] and ETPUA[4], signals is determined by the WKPCFG pin.
Table 6-80. PCR118 PA Field Definitions
PA Field Pin Function
0b00 GPIO[118]
0b01 ETPUA[4]
0b10 ETPUA[16]
0b11 ETPUA[4]
Address: Base + 0x012E Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When ETPUA[5], or GPIO[119] are configured as outputs, set the OBE bit to 1. When configured as ETPUA[17], the OBE bit
has no effect.
IBE
2
2
The IBE bit must be set to one for ETPUA[5], ETPUA[17], and GPIO[119] when configured as inputs.
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down value at reset for ETPUA[5] and ETPUA[17], is determined by WKPCFG.