System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-81
Refer to Table 6-19 for bit field definitions. Table 6-103 lists the PA fields for
EMIOS[13]_SOUTD_GPIO[192].
6.3.1.104 Pad Configuration Register 193 (SIU_PCR193)
The SIU_PCR193 register controls the function, direction, and electrical attributes of
EMIOS[14]_IRQ[0]_CNTXD_GPIO[193]. The input and output functions for EMIOS[14] are both
connected.
Figure 6-105. EMIOS[14]_IRQ[0]_CNTXD_GPIO[193] Pad Configuration Register (SIU_PCR193)
Refer to Table 6-19 for bit field definitions. Table 6-104 lists the PA fields for
EMIOS[14]_IRQ[0]_CNTXD_GPIO[193].
Table 6-103. PCR192 PA Field Definitions
PA Field Pin Function
0b00 GPIO[192]
0b01 EMIOS[13]
0b10 SOUTD
0b11 EMIOS[13]
Address: Base + 0x01C2 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for GPIO[193] when configured as output.
IBE
2
2
When the pad is configured as output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When CNTXD or GPIO[193] is configured as input, set the IBE bit 1.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[14] pin is determined by the WKPCFG pin.
Table 6-104. PCR193 PA Field Definitions
PA Field Pin Function
0b000 GPIO[193]
0b001 EMIOS[14]
0b010 IRQ[0]
0b011 EMIOS[14]
0b100 CNTXD
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