Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
25-40 Freescale Semiconductor
 
25.11.4 Read/Write Access Control and Status (RWCS)
The read write access control/status register provides control for read/write access. Read/write access 
provides DMA-like access to memory-mapped resources on the system bus either while the processor is 
halted, or during runtime. The RWCS register also provides read/write access status information as shown 
in Table 25-30.
Table 25-29 describes the fields and functions in the read/write control and status (RWCS) register:
Nexus Reg: 0x0007 Access: R/W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
AC RW SZ MAP PR BST
00000
W
Reset0000000000000000
 1514131211109876543210
R
CNT ERR DV
W
Reset0000000000000000
Figure 25-18. Read/Write Access Control and Status Register (RWCS)
Table 25-29. RWCS Field Description
Field Description
31
AC
Access control.
0 End access
1Start access
30
RW
Read/write select.
0 Read access
1 Write access
29–27
SZ[2:0]
Word size.
000 8-bit (byte)
001 6-bit (halfword)
010 32-bit (word)
011 64-bit (doubleword - only in burst mode)
100–111 Reserved (default to word)
26–24
MAP[2:0]
MAP select.
000 Primary memory map
001–111 Reserved
23–22
PR[1:0]
Read/write access priority.
00 Lowest access priority
01 Reserved (default to lowest priority)
10 Reserved (default to lowest priority)
11 Highest access priority
21
BST
Burst control.
0 Module accesses are single bus cycle at a time.
1 Module accesses are performed as burst operation.
20–16 Reserved