NXP Semiconductors MPC5566 - Etpu Time Base Configuration Register (ETPU_TBCR)

Enhanced Time Processing Unit (eTPU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 18-27
18.4.4.1 eTPU Time Base Configuration Register (ETPU_TBCR)
This register configures several time base options.
NOTE
The MPC5566 has two eTPU engines, each with a dedicated TCRCLK
signal: TCRCLKA and TCRCLKB.
Address: Base + 0x0000_0020 (eTPU A)
Address: Base + 0x0000_0040 (eTPU B)
Access: R/W
0123456789101112131415
R
TCR2CTL TCRCF
0
AM
000
TCR2P
W
Reset0010000000001000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TCR1CTL
000000
TCR1P
W
Reset0000000000000000
Figure 18-10. eTPU Time Base Configuration Register (ETPU_TBCR)