System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-44 Freescale Semiconductor
6.3.1.46 Pad Configuration Register 73 (SIU_PCR73)
The SIU_PCR73 register controls the function, direction, and electrical attributes of
BG_FEC_MDIO_GPIO[73]. This register allows selection of GPIO functions.
To use the BG function, the PA field must be set to BG before EBI_MCR[EXTM] is set.
Figure 6-47. BG_FEC_MDIO_GPIO[73] Pad Configuration Register (SIU_PCR73)
Refer to Table 6-19 for bit field definitions. Table 6-47 lists the PA field for BG_FEC_MDIO_GPIO[73].
6.3.1.47 Pad Configuration Register 74 (SIU_PCR74)
The SIU_PCR74 register controls the function, direction, and electrical attributes of BB_GPIO[74]. This
register allows selection of the GPIO function. To use the BB function, the PA field must be set to BB
before EBI_MCR[EXTM] is set.
Figure 6-48. BB_GPIO[74] Pad Configuration Register PCR74
Address: Base + 0x00D2 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as BG or FEC_MDIO, the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as BG or FEC_MDIO, clear the ODE bit to 0.
HYS
4
4
If external master operation is enabled, clear the HYS bit to 0.
0 0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as BG or FEC_MDIO.
WPS
5
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
Table 6-47. PCR73 PA Field Definition
PA Field Pin Function
0b00 GPIO[73]
0b01 BG
0b10 FEC_MDIO
0b11 Invalid value
Address: Base + 0x00D2 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as BB, the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as BB, clear the ODE bit to 0.
HYS
4
4
If external master operation is enabled, clear the HYS bit to 0.
0 0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as BB.
WPS
5
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
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