System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-39
6.3.1.37 Pad Configuration Register 62 (SIU_PCR62)
The SIU_PCR62 register controls the function, direction, and electrical attributes of RD_WR_GPIO[62].
Figure 6-38. RD_WR_GPIO[62] Pad Configuration Register (SIU_PCR62)
Refer to Table 6-19 for bit field definitions. Table 6-46 lists the PA fields for RD_WR_GPIO[62].
6.3.1.38 Pad Configuration Register 63 (SIU_PCR63)
The SIU PCR63 register controls the function, direction, and electrical attributes of BDIP_GPIO[63].
Figure 6-39. BDIP_GPIO[63] Pad Configuration Register (SIU_PCR63)
Refer to Table 6-19 for bit field definitions. Table 6-46 lists the PA fields for BDIP_GPIO[63].
Address: Base + 0x00BC Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA OBE
1
1
When configured as RD_WR, the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as RD_WR, clear the ODE bit to 0.
HYS
4
4
When external master operation is enabled, clear the HYS bit to 0.
0 0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as RD_WR.
WPS
5
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
Table 6-38. PCR62 PA Field Definition
PA Field Pin Function
0b0 GPIO[62]
0b1 RD_WR
Address: Base + 0x00BE Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA OBE
1
1
When configured as BDIP, the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as BDIP, clear the ODE bit to 0.
HYS
0 0
WPE
4
4
Refer to the EBI section for weak pullup settings when configured as BDIP.
WPS
4
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
Table 6-39. PCR63 PA Field Definition
PA Field Pin Function
0b0 GPIO[63]
0b1 BDIP
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