NXP Semiconductors MPC5566 - Pad Configuration Register 201 (SIU_PCR201)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-86 Freescale Semiconductor
6.3.1.111 Pad Configuration Register 201 (SIU_PCR201)
The SIU_PCR201 register controls the function, direction, and electrical attributes of
EMIOS[22]_ETPUB[6]_GPIO[201]. Both the input and output functions of EMIOS[22] are connected.
Only the output channel of ETPUB[6] is connected.
Figure 6-112. EMIOS[22]_ETPUB[6]_GPIO[201] Pad Configuration Register (SIU_PCR201)
Refer to Table 6-19 for bit field definitions. Table 6-111 lists the PA fields for
EMIOS[22]_ETPUB[6]_GPIO[201].
6.3.1.112 Pad Configuration Register 202 (SIU_PCR202)
The SIU_PCR202 register controls the function, direction, and electrical attributes of
EMIOS[23]_ETPUB[7]_GPIO[202]. Both the input and output functions of EMIOS[23] are connected.
Only the output channel of ETPUB[7] is connected.
Figure 6-113. EMIOS[23]_ETPUB[7]_GPIO[202] Pad Configuration Register (SIU_PCR202)
Address: Base + 0x01D2 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for EMIOS[22] or GPIO[201] when configured as output.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[22] or GPIO[201] when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[22] pin is determined by the WKPCFG pin.
Table 6-111. PCR201 PA Field Definitions
PA Field Pin Function
0b00 GPIO[201]
0b01 EMIOS[22]
0b10 ETPUB[6]
0b11 EMIOS[22]
Address: Base + 0x01D4 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for EMIOS[23] or GPIO[202] when configured as output.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[23] or GPIO[202] when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[23] pin is determined by the WKPCFG pin.