System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-120 Freescale Semiconductor
6.4.1.1 Boot Configuration
The BOOTCFG[0:1] pins determine the boot mode initiated by the BAM program, and whether external
arbitration is selected for external booting. The BAM program uses the BOOTCFG[0] to determine where
to read the reset configuration halfword (RCHW), and whether to initiate a FlexCAN or eSCI boot.
Table 6-155 defines the boot modes specified by the BOOTCFG[0:1] pins. If the RSTCFG
pin is asserted
during the assertion of RSTOUT
, except in the case of a software external reset, the BOOTCFG pins are
latched four clock cycles prior to the negation of the RSTOUT pin and are used to update the SIU_RSR
and the BAM boot mode. Otherwise, if RSTCFG is negated during the assertion of RSTOUT, the
BOOTCFG pins are ignored and the boot mode defaults to ‘Boot from internal flash memory.’
Refer to Section 16.3.2.2.5, “Read the Reset Configuration Halfword,” for details on the RCHW.
6.4.1.2 Pad Configuration
The pad configuration registers (SIU_PCR) in the SIU allow software control over the following electrical
characteristics of the external pads:
• Weak pullup/down enable/disable
• Weak pullup/down selection
• Slew-rate selection for outputs
• Drive strength selection for outputs
• Input buffer enable (when direction is configured for output)
• Input hysteresis enable/disable
• Open drain/push-pull output selection
• Multiplexed function selection
• Data direction selection
The pad configuration registers are provided to allow centralized control over external pins that are shared
by more than one module. Each pad configuration register controls a single pin.
Table 6-155. BOOTCFG[0:1] Configuration
Value Meaning
0b00 Boot from internal flash memory
0b01 FlexCAN/eSCI boot
0b10 Boot from external memory (no arbitration)
0b11 Boot from external memory (external arbitration)
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