NXP Semiconductors MPC5566 - Pad Configuration Registers 64-65 (SIU_PCR64-SIU_PCR65)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-40 Freescale Semiconductor
6.3.1.39 Pad Configuration Registers 64–65 (SIU_PCR64–SIU_PCR65)
The SIU_PCR64–SIU_PCR65 registers control the function, direction, and electrical attributes of
WE/BE[0:1]_GPIO[64:65]. The PA bit in PCR64 and PCR65 registers select between the write/byte
enable functions and the GPIO functions. The WEBS bit in the EBI base registers selects between the
write-enable function and byte-enable function.
Figure 6-40. WE/BE[0:1]_GPIO[64:65] Pad Configuration Registers (SIU_PCR64–SIU_PCR65)
Refer to Table 6-19 for bit field definitions. Table 6-46 lists the PA fields for WE/BE[0:1]_GPIO[64:65].
6.3.1.40 Pad Configuration Registers 66–67 (SIU_PCR66–SIU_PCR67)
The SIU_PCR66–SIU_PCR67 registers control the function, direction, and electrical attributes of
WE/BE[2:3]_GPIO[66:67]. The PA bit in the PCR66 and PCR67 registers select between write/byte
enable functions and the GPIO functions. The WEBS bit in the EBI base registers selects between the
write-enable (WE) function and byte-enable (BE) function.
Figure 6-41. WE/BE[2:3]_GPIO[66:67] Pad Configuration Registers (SIU_PCR66–SIU_PCR67)
Address: Base + (0x00C0–0x00C2) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA OBE
1
1
When configured as WE/BE[0:1], the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as WE/ BE[0:1], clear the ODE bit to 0.
HYS
0 0
WPE
4
4
Refer to the EBI section for weak pullup settings when configured as WE/ BE[0:1].
WPS
4
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
Table 6-40. PCR64–PCR65 PA Field Definition
PA Field Pin Function
0b0 GPIO[64:65]
0b1 WE/BE[1:0]
Address: Base + (0x00C4–0x00C6) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA OBE
1
1
When configured as WE/BE[2:3], the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as WE/BE[2:3], clear the ODE bit to 0.
HYS
0 0
WPE
4
4
Refer to the EBI section for weak pullup settings when configured as WE/BE[2:3].
WPS
4
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1