Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
19-94 Freescale Semiconductor
Figure 19-52. Overlapping Consecutive Conversion Commands
19.4.6 Internal/External Multiplexing
19.4.6.1 Channel Assignment
The internal analog multiplexers select one of the 40 analog input pins for conversion, based on the
CHANNEL_NUMBER field of a Command Message. The analog input pin channel number assignments
and the pin definitions vary depending on how the ADC0/1_EMUX are configured. Only one ADC can
drive the external mux address pins: therefore ADC0_EMUX and ADC1_EMUX must not be asserted at
the same time.
During differential conversions the analog multiplexer passes differential signals to both the positive and
negative terminals of the ADC. The differential conversions can only be initiated on four channels: DAN0,
DAN1, DAN2, and DAN3. Refer to Table 19-51 and Figure 19-52 for the channel numbers used to select
differential conversions.
MUX Settle Time
and Sampling
AD Conversion
Minimum time necessary to perform a single
conversion after channel number is changed
MUX Settle Time
and Sampling
AD Conversion
Channel # Change
and Sample Start
Channel # Change
& Sample Start
(a) Command Execution Sequence for Two Non-Overlapped Commands
Conversion starts immediately after
channel # change. ADC sample time
should compensate for MUX internal
capacitance settling and for the sampling
on the sampling capacitor. If sample time
is not long enough then conversion
MUX Settle Time
& Sampling
AD Conversion
Sampling AD Conversion
Channel # Change
and Sample Start
Channel #
(b) Command Execution Sequence for Two Overlapped Commands
MUX
Settle Time
Change
Sample
Start
Channel # changes before sampling starts leading to
more time for MUX internal capacitance to settle.
results have reduced accuracy
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