NXP Semiconductors MPC5566 - Page 898

Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 19-95
Table 19-51 shows the channel number assignments for the non-multiplexed mode. The 40 single-ended
channels and 4 differential pairs are shared between the two ADCs.
Table 19-52 shows the channel number assignments for multiplexed mode. The ADC with the
ADCn_EMUX bit asserted can access at most 33 single-ended and 32 externally multiplexed channels.
Refer to Section 19.4.6.2, “External Multiplexing,” for a detailed explanation about how external
multiplexing can be achieved.
Table 19-50. ADCn_EMUX Bits Combinations
ADC0_EMUX ADC1_EMUX
Set CHANNEL_NUMBER
ADC0 ADC1
0 0 No external mux No external mux
0 1 ADC1 uses the external mux ADC1 uses the external mux
1 0 ADC0 uses the external mux ADC0 uses the external mux
1 1 Do not use – reserved
Table 19-51. Non-multiplexed Channel Assignments
1
1
The two on-chip ADCs can access the same analog input pins but simultaneous conversions are not allowed. Also, when
one ADC is performing a differential conversion on a pair of pins, the other ADC must not access either of these two pins
as single-ended channels.
Input Pins
Channel Number in
CHANNEL_NUMBER Field
Analog
Pin Name
Other
Functions
Conversion Type Binary Decimal
AN[0]–AN[39] Single-ended 0000_0000–0010_0111 0–39
V
RH
Single-ended 0010_1000 40
V
RL
Single-ended 0010_1001 41
(V
RH
- V
RL
) ÷ 2
see footnote
2
2
This equation only applies before calibration. After calibration, the 50% reference point returns approximately 20mV lower
than the expected 50% of the difference between the High Reference Voltage (V
RH
) and the Low Reference Voltage (V
RL
).
For calibration of the ADC, only use the 25% and 75% points as described in Section 19.5.6.1, “MAC Configuration
Procedure”
Single-ended 0010_1010 42
75% x (V
RH
- V
RL
) Single-ended 0010_1011 43
25% x (V
RH
- V
RL
) Single-ended 0010_1100 44
Reserved 0010_1101–0101_1111 45–95
DAN0+ and DAN0-
DAN1+ and DAN1-
DAN2+ and DAN2-
DAN3+ and DAN3-
Differential
Differential
Differential
Differential
0110_0000
0110_0001
0110_0010
0110_0011
96
97
98
99
Reserved 0110_0100–1111_1111 100–255