NXP Semiconductors MPC5566 - Emios Channel;Etpu B Output Channel; GPIO EMIOS[20:21]_ETPUB[4:5]_GPIO[199:200]

Signal Description
MPC5566 Microcontroller Reference Manual, Rev. 2
2-40 Freescale Semiconductor
2.3.10.11 eMIOS Channel /eTPU B Output Channel / GPIO
EMIOS[20:21]_ETPUB[4:5]_GPIO[199:200]
EMIOS[20:21]_ETPUB[4:5]_GPIO[199:200] is an input/output channel pin for the eMIOS module.
2.3.10.12 eMIOS Channel / eTPU B Output Channel / GPIO
EMIOS[22]_ETPUB[6]_GPIO[201]
EMIOS[22]_ETPUB[6]_GPIO[201] is an input/output channel pin for the eMIOS module. The alternate
function is ETPU B output channel.
2.3.10.13 eMIOS Channel / eTPU B Output Channel / GPIO
EMIOS[23]_ETPUB[7]_GPIO[202]
EMIOS[23]_ETPUB[7]_GPIO[202] is an input/output channel pin for the eMIOS module.The alternate
function is an ETPU B output channel.
2.3.11 General Purpose Input/Output (GPIO) Signals
2.3.11.1 eMIOS Output Channel / GPIO
EMIOS[14:15]_GPIO[203:204]
The EMIOS[14:15]_GPIO[203:204] pins’ primary function is EMIOS[14:15]. When configured as
EMIOS[14:15], the pins function as output channels for the eMIOS module. Because other balls on the
BGA map are already named EMIOS[14:15], the ball names on the BGA map for these signals are named
GPIO[203:204]. The general purpose I/O function for these pins is GPIO.
2.3.11.2 General Purpose Input Output
GPIO[205]
The GPIO[205] only has GPIO functionality. This pin is reserved for double data rate memory interface
support. The pad type for GPIO[205] is MH (3.0–5.5 V).
2.3.11.3 General Purpose Input Output
GPIO[206:207]
GPIO[206:207] have GPIO functionality. The GPIO pins are reserved for double data rate memory
(DDRAM) interface support. The pad types for GPIO[206:207] is F (1.62–3.6 V).
Read Section 6.3.1.115, “Pad Configuration Registers 206–207 (SIU_PCR206–SIU_PCR207).”
The GPIO[206:207] pins can be selected as sources for the ADC trigger in the SIU_ETISR.