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NXP Semiconductors MPC5566 User Manual

NXP Semiconductors MPC5566
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Flash Memory
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 13-37
Accessing the flash memory array when STOP is asserted results in an error response from the flash BIU
to the system bus. Memory array accesses must not be attempted until the flash transitions out of stop
mode.
13.4.4 Flash Memory Array: Reset
A reset is the highest priority operation for the flash and terminates all other operations.
The flash uses reset to initialize register and status bits to their default reset values. If the flash is executing
a program or erase operation and a reset is issued, the operation is aborted and the flash disables the high
voltage logic without damage to the high voltage circuits. Reset aborts all operations and forces the flash
into normal operating mode ready to receive accesses. FLASH_MCR[DONE] is set to 1 at the exit of reset.
After reset is negated, register accesses can be performed, although registers that require updating from
shadow information, or other inputs, cannot read updated values until flash exits reset.
FLASH_MCR[DONE] can be polled to determine if reset has been exited.

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NXP Semiconductors MPC5566 Specifications

General IconGeneral
BrandNXP Semiconductors
ModelMPC5566
CategoryMicrocontrollers
LanguageEnglish

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