Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
19-70 Freescale Semiconductor
If a closed gate is detected while no command transfers are taking place and the CFIFO status is triggered,
the CFIFO status is immediately changed to IDLE, the SSS bit is negated, and the PF flag is asserted. If a
closed gate is detected during the serial transmission of a command to the external device, it has no affect
on the CFIFO status until the transmission completes. After the transmission is completed, the TC_CF
counter is updated, the SSS bit is negated, the PF flag is asserted, and the CFIFO status is changed to IDLE.
An asserted SSS bit and a level trigger are required to restart the CFIFO. Command transfers restart from
the point they have stopped.
If the gate closes and opens during the same serial transmission of a command to the external device, it
has no effect on the CFIFO status or on the PF flag, but the TORF flag asserts as shown in Figure 19-40.
Therefore, closing the gate for a period less than a serial transmission time interval does not guarantee that
the closure affects command transfers from a CFIFO.
The pause bit has no effect in single-scan level trigger mode.
19.4.3.5.3 Continuous-Scan Mode
In continuous-scan mode, multiple passes looping through a sequence of command messages in a
command queue are executed. When a CFIFO is programmed for a continuous-scan mode, the
EQADC_CFCRn[SSE] (see Section 19.3.2.6, “eQADC CFIFO Control Registers 0–5
(EQADC_CFCRn)”) does not have any effect.
Continuous-Scan Software Trigger
When a CFIFO is programmed to continuous-scan software trigger mode, the CFIFO is triggered
immediately. The CFIFO commands start to be transferred when the CFIFO becomes the highest priority
CFIFO using an available on-chip ADC or an external command buffer that is not full. When a CFIFO is
programmed to run in continuous-scan software trigger mode, the eQADC does not halt transfers from the
CFIFO until the CFIFO operation mode is modified to disabled or a higher priority CFIFO preempts it.
Although command transfers do not stop upon detection of an asserted EOQ bit, the EOQF is set and, if
enabled, an EOQ interrupt request is generated.
The pause bit has no effect in continuous-scan software trigger mode.
Continuous-Scan Edge Trigger
When rising, falling, or either edge trigger mode is selected for a CFIFO, a corresponding edge on the
associated ETRIG signal places the CFIFO in a TRIGGERED state. The CFIFO commands start to be
transferred when the CFIFO becomes the highest priority CFIFO using an available on-chip ADC or an
external command buffer that is not full.
When an EOQ or a pause is encountered, the eQADC halts command transfers from the CFIFO and, if
enabled, the appropriate interrupt requests are generated. Another edge trigger event is required to resume
command transfers but no software involvement is required to rearm the CFIFO to detect such event.
A trigger overrun happens when the CFIFO is already in a TRIGGERED state and a new edge trigger event
is detected.
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