NXP Semiconductors MPC5566 - Introduction

MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 11-1
Chapter 11
Frequency Modulated Phase Locked Loop and System
Clocks (FMPLL)
11.1 Introduction
This section describes the features and function of the FMPLL module.
11.1.1 Block Diagrams
This section contains block diagrams that illustrate the FMPLL, the clock architecture, and the various
FMPLL and clock configurations that are available. The following diagrams are provided:
• Figure 11-1, “FMPLL and Clock Architecture”
• Figure 11-2, “FMPLL Bypass Mode”
• Figure 11-3, “FMPLL External Reference Mode”
• Figure 11-4, “FMPLL Crystal Reference Mode Without FM”
• Figure 11-5, “FMPLL Crystal Reference Mode With FM”
• Figure 11-6, “FMPLL Dual-Controller (1:1) Mode”