NXP Semiconductors MPC5566 - Pad Configuration Registers 4-7 (SIU_PCR4-SIU_PCR7)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-26 Freescale Semiconductor
6.3.1.15 Pad Configuration Registers 4–7 (SIU_PCR4–SIU_PCR7)
The SIU_PCR4–SIU_PCR7 registers control the function, direction, and electrical attributes of
ADDR[8:11]_GPIO[4:7].
Figure 6-16. ADDR[8:11]_GPIO[4:7] Pad Configuration Registers (SIU_PCR4–SIU_PCR7)
Refer to Table 6-19 for bit field definitions. Table 6-22 lists the PA values for ADDR[8:11]_GPIO[4:7].
6.3.1.16 Pad Configuration Registers 8–22 (SIU_PCR8–SIU_PCR22)
The SIU_PCR8–SIU_PCR22 registers control the function, direction, and electrical attributes of
ADDR[12:26]_GPIO[8:22].
Figure 6-17. ADDR[12:26]_GPIO[8:22] Pad Configuration Registers (SIU_PCR8–SIU_PCR22)
Address: Base + (0x0048–0x004E) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA
1
1
Do not configure the PA fields in PCR0–3 and PCR4–7 to select ADDR[8:11]. Only configure one set of pins to provide
address input.
OBE
2
2
When configured as ADDR[8:11] the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
3
3
When configured as ADDR[8:11], or GPDO, set the IBE bit to 1 to reflect the pin state in the GPDI register. Clear the IBE bit
to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
4
4
When configured as ADDR[8:11] clear the ODE bit to 0.
HYS
5
5
If external master operation is enabled, clear the HYS bit to 0.
0 0
WPE
6
6
Refer to the EBI section for weak pullup settings when configured as ADDR[8:11].
WPS
6
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
Table 6-22. PCR4–PCR7 PA Field Descriptions
PA Field Pin Function
0b0 GPIO[4:7]
0b1 ADDR[8:11]
Address: Base + (0x0050–0x006C) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA OBE
1
1
When configured as ADDR[12:26], the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When configured as ADDR[12:26] or GPDO, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as ADDR[12:26], clear the ODE bit to 0.
HYS
4
4
If external master operation is enabled, clear the HYS bit to 0.
0 0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as ADDR[8:26].
WPS
5
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1