NXP Semiconductors MPC5566 - Pad Configuration Registers 127-129 (SIU_PCR127-SIU_PCR129)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-70 Freescale Semiconductor
6.3.1.87 Pad Configuration Registers 127–129 (SIU_PCR127–SIU_PCR129)
The SIU_PCR127–SIU_PCR129 registers control the function, direction, and electrical attributes of
ETPUA[13:15]_PCSB[3:5]_GPIO[127:129].
Figure 6-88. ETPUA[13:15]_PCSB[3:5]_GPIO[127:129]
Pad Configuration Register (SIU_PCR127–SIU_PCR129)
Refer to Table 6-19 for bit field definitions. Table 6-87 lists the PA fields for
ETPUA[13:15]_PCSB[3:5]_GPIO[127:129].
6.3.1.88 Pad Configuration Register 130–133 (SIU_PCR130–SIU_PCR133)
The SIU_PCR130–SIU_PCR133 registers control the function, direction, and electrical attributes of
ETPUA[16:19]_PCSD[1:4]_GPIO[130:133].
Figure 6-89. ETPUA[16:19]_PCSD[1:4]_GPIO[130:133]
Pad Configuration Register (SIU_PCR130–SIU_PCR133)
Address: Base + (0x013E–0x0142) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as PCSB[3:5], the OBE bit has no effect. The OBE bit must be set to 1 for ETPUA[13:15] or GPIO[127:129]
when configured as outputs.
IBE
2
2
The IBE bit must be set to 1 for ETPUA[13:15], PSCB[3:5], or GPIO[127:129] when configured as inputs. When configured as
output, set the IBE bit to 1 to show the pin state in the GPDI register.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the ETPUA[13:15], and PCSB[3:5] pins is determined by the WKPCFG pin.
Table 6-87. PCR127–PCR129 PA Field Definitions
PA Field Pin Function
0b00 GPIO[127:129]
0b01 ETPUA[13:15]
0b10 PCSB[3:5]
0b11 ETPUA[13:15]
Address: Base + (0x0144–0x014A) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as PCSD[1:4], the OBE bit has no effect. Set the OBE bit to 1 for ETPUA[16:19] or GPIO[130:133] when
configured as outputs.
IBE
2
2
The IBE bit must be set to 1 for ETPUA[16:19] or GPIO[130:133] when configured as inputs. When the pad is configured as
an output, set the IBE bit to 1 to show the pin state in the GPDI register.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the ETPUA[16:19] pin is determined by the WKPCFG pin.