NXP Semiconductors MPC5566 - Bus Operation in External Master Mode

External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 12-59
12.4.2.10 Bus Operation in External Master Mode
External master mode enables an external master to access the internal address space of the MCU.
Figure 12-38 shows how to connect an MCU to an external master (a second MCU) and a shared SDR
memory to operate in external master mode. Full multi-master support is available.
Figure 12-38. MCU Connected to External Master and SDR Memory
When the external master requires external bus accesses, it takes ownership on the external bus, and the
direction of most of the bus signals is inverted, relative to its direction when the MCU owns the bus.
To operate two masters in external master mode, one must be configured for internal arbitration and the
other must be configured for external arbitration. Connecting three or more masters together in the same
system is not supported by this EBI.
CLKOUT
CS
[0]
TS
TSIZ[0:1]
WE/BE[0]
ADDR[8:31] *
DATA[0:31]
BDIP
RD_WR
TA
TEA
CK
CS
ADV
BAA
WE
A[0:21]
DATA[0:31]
SDR
Memory
Master MCU
(configured for
internal arbitration)
EXTAL
CS
[0]
TS
TSIZ[0:1]
WE/BE[0]
ADDR[8:31] *
DATA[0:31]
BDIP
RD_WR
TA
TEA
Slave MCU
(configured for
external arbitration)
* Only ADDR[8:29] are connected to the 32-bit SDR memory.