NXP Semiconductors MPC5566 - Pad Configuration Register 189-190 (SIU_PCR189-SIU_PCR190)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-79
Refer to Table 6-19 for bit field definitions. Table 6-100 lists the PA fields for
EMIOS[0:9]_ETPUA[0:9]_GPIO[179:188].
6.3.1.101 Pad Configuration Register 189–190 (SIU_PCR189–SIU_PCR190)
The SIU_PCR189–SIU_PCR190 registers control the function, direction, and electrical attributes of
EMIOS[10:11]_PCSD[3:4]_GPIO[189:190]. Both the input and output functions of EMIOS[10:11] are
connected.
Figure 6-102. EMIOS[10:11]_PCSD[3:4]_GPIO[189:190] Pad Configuration Register
(SIU_PCR189–SIU_PCR190)
Refer to Table 6-19 for bit field definitions. Table 6-101 lists the PA fields for
EMIOS[10:11]_PCSD[3:4]_GPIO[189:190].
Table 6-100. PCR179–PCR188 PA Field Definitions
PA Field Pin Function
0b00 GPIO[179:188]
0b01 EMIOS[0:9]
0b10 ETPUA[0:9]
0b11 EMIOS[0:9]
Address: Base + (0x01BA–0x01BC) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for EMIOS[10:11] or GPIO[189:190] when configured as output.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[10:11] or GPIO[189:190] when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[10:11] pins is determined by the WKPCFG pin.
Table 6-101. PCR189–PCR190 PA Field Definitions
Pin Function
GPIO[189:190]
EMIOS[10:11]
PCSD[3:4]
EMIOS[10:11]