NXP Semiconductors MPC5566 - Pad Configuration Register 197 (SIU_PCR197)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-84 Freescale Semiconductor
6.3.1.108 Pad Configuration Register 197 (SIU_PCR197)
The SIU_PCR197 register controls the function, direction, and electrical attributes of
EMIOS[18]_ETPUB[2]_GPIO[197]. Both the input and output functions of EMIOS[18] is connected.
Only the output channels of ETPUB[2] is connected.
Figure 6-109. EMIOS[18]_ETPUB[2]_GPIO[197] Pad Configuration Register (SIU_PCR197)
Refer to Table 6-19 for bit field definitions. Table 6-108 lists the PA fields for
EMIOS[18]_ETPUB[2]_GPIO[197].
6.3.1.109 Pad Configuration Register 198 (SIU_PCR198)
The SIU_PCR198 register controls the function, direction, and electrical attributes of the
EMIOS[19]_ETPUB[3]_GPIO[198] pin. Both the input and output functions of EMIOS[19] are
connected. Only the output channels of ETPUB[3] are connected.
Figure 6-110. EMIOS[19]_ETPUB[3]_GPIO[198] Pad Configuration Register (SIU_PCR198)
Address: Base + 0x01CA Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for EMIOS[18] or GPIO[197] when configured as output.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[18] or GPIO[197] when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[18] pin is determined by the WKPCFG pin.
Table 6-108. PCR197 PA Field Definitions
PA Field Pin Function
0b00 GPIO[197]
0b01 EMIOS[18]
0b10 ETPUB[2]
0b11 EMIOS[18]
Address: Base + 0x01CC Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for EMIOS[19] and GPIO[198] when configured as output.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[19] or GPIO[198] when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[19] pins is determined by the WKPCFG pin.