NXP Semiconductors MPC5566 - RSTCFG Pin

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MPC5566 Microcontroller Reference Manual, Rev. 2
4-12 Freescale Semiconductor
4.4.3.1 RSTCFG Pin
Table 4-5 shows the RSTCFG pin settings for configuring the MCU to use a default or a custom
configuration.
Refer to Chapter 2, “Signal Description” for more information about the RSTCFG pin.
4.4.3.2 WKPCFG Pin (Reset Weak Pullup/Pulldown Configuration)
As shown in Table 4-6, the signal on the WKPCFG pin determines whether specific eTPU and eMIOS pins
are connected to weak pullup or weak pulldown devices during and after reset.
For all reset sources except the software external reset, the WKPCFG pin is applied starting when the
internal reset signal asserts (RSTOUT). If the WKPCFG signal is logic high when RSTOUT asserts, pullup
devices are enabled on the eTPU and eMIOS pins. If the WKPCFG signal is logic low when RSTOUT
asserts, pulldown devices are enabled on those pins. The value on WKPCFG must remain constant during
reset to avoid oscillations on the eTPU and eMIOS pins caused by switching pullup/down states. The final
value of WKPCFG is latched four clock cycles before RSTOUT negates. After reset, software can modify
the weak pullup/down selection for all I/O pins through the PCRs in the SIU.
Refer to Chapter 2, “Signal Description” for information about the WKPCFG pin and how the eTPU and
eMIOS pins that are affected.
4.4.3.3 BOOTCFG[0:1] Pins (MCU Configuration)
In addition to specifying the RCHW location, the values latched on the BOOTCFG[0:1] pins at reset
initialize the internal flash memory enabled/disabled state, and determine whether no arbitration or
external arbitration of the external bus interface is selected. Additionally, the RCHW can determine either
directly or indirectly how the MMU is configured, how the external bus is configured, the FlexCAN or
eSCI module pin configuration, Nexus enabling, and password selection.
Refer to Chapter 2, “Signal Description” for information about the BOOTCFG pins.
Table 4-5. RSTCFG Settings
RSTCFG Description
1 Use default configuration of:
– booting from internal flash
– clock source is a crystal on FMPLL
0 Get configuration information from:
– BOOTCFG[0:1]
– PLLCFG[0:1]
Table 4-6. WKPCFG Settings
WKPCFG Description
0 Weak pulldown applied to eTPU and eMIOS pins at reset
1 Weak pullup applied to eTPU and eMIOS pins at reset