Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 25-45
Table 25-33 illustrates the range that is selected for data trace for various cases of DTSA being less than,
greater than, or equal to DTEA.
NOTE
DTSA must be less than DTEA to guarantee correct data write/read traces.
Data trace ranges are exclusive of the DTSA and DTEA addresses.
25.11.11 NZ6C3 Register Access via JTAG / OnCE
Access to Nexus3 register resources is enabled by loading a single instruction
(ACCESS_AUX_TAP_ONCE) into the JTAGC instruction register (IR), and then loading the
corresponding OnCE OCMD register with the NEXUS3_ACCESS instruction (refer to Table 25-5). For
the NZ6C3 module, the OCMD value is 0b00_0111_1100.
After the ACCESS_AUX_TAP_ONCE instruction has been loaded, the JTAG/OnCE port allows
tool/target communications with all Nexus3 registers according to the register map in Table 25-24.
Reading/writing of a NZ6C3 register then requires two (2) passes through the data-scan (DR) path of the
JTAG state machine (refer to 25.14.10).
1. The first pass through the DR selects the NZ6C3 register to be accessed by providing an index
(refer to Table 25-24), and the direction (read/write). This is achieved by loading an 8-bit value into
the JTAG data register (DR). This register has the following format:
Nexus Reg: 0x0013 Access: R/W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Data Trace End Address
W
Reset00000000000000000000000000000000
Figure 25-26. Data Trace End Address Register 2 (DTEA2)
Table 25-33. Data Trace—Address Range Options
Programmed Values Range Control Bit Value Range Selected
DTSA < DTEA 0 DTSA -> <- DTEA
DTSA < DTEA 1 <- DTSA DTEA ->
DTSA > DTEA N/A Invalid range—no trace
DTSA = DTEA N/A Invalid range—no trace
Nexus register index
(7-bits) (1-bit)
R/W
RESET Value: 0x00
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