NXP Semiconductors MPC5566 - Task Scheduler

Enhanced Time Processing Unit (eTPU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 18-7
Figure 18-4. PSE Accesses
Each eTPU channel can be associated with a variable number of parameters located in the SDM, according
to its selected function. In addition, the SDM can be fully shared between two eTPU engines, enabling
communication between them. Each function can require a different number of parameters. During eTPU
initialization the host has to program channel base addresses, allocating proper parameters for each
channel according to its selected function.
In the host address space each parameter occupies four bytes (32 bits). eTPU usage of the upper byte is
achieved by having a 32-bit preload (P) register that can access the upper byte, the lower 24 bits, or all the
32 bits. The microcode can switch between access sizes at any time.
18.1.4.5 Task Scheduler
As mentioned in Section 18.1.3, “eTPU Operation Overview,” every channel function is composed of one
or more threads, and threads cannot be interrupted by host or channel events, such as channel servicing.
The function of the task scheduler, therefore, is to recognize and prioritize the channels needing service
and grant execution time to each channel. The time given to an individual thread for execution or service
is called a time slot. The duration of a time slot is determined by the number of instructions executed in
the thread plus SDM wait-states received, and varies in length. Although several channels can request
service at the same time, the function threads must be executed serially.
At any time, an arbitrary number of channels can require service. The channel logic, eTPU microcode, or
the host application notifies the scheduler by issuing a service request.
Out of reset, all channels are disabled. The device core makes a channel active by assigning it one of three
priorities: high, middle, or low. The scheduler determines the order in which channels are serviced based
on channel number and assigned priority. The priority mechanism, implemented in hardware, ensures that
all requesting channels are serviced.
[31:24] [23:16] [15:8] [7:0]
SDM
0 0 1 0 1 1 1 1 0 1 1 0 1 1 1 1 0 1 1 0 1 1 1 1
0 0 1 0 1 1 1 1 0 1 1 0 1 1 1 1 0 1 1 0 1 1 1 1
0 0 0 0 0 0 0 0
Example 1:
Read with
sign extension
[31:24] [23:16] [15:8] [7:0]
SDM
0 1 1 0 1 1 1 1 0 1 1 0 1 1 1 1
1 0 1 0 1 1 1 1 0 1 1 0 1 1 1 1 0 1 1 0 1 1 1 1
Example 2:
Read with
sign extension
Most
byte
significant
Most
byte
significant
Most
byte
significant
2nd most
byte
significant
1 0 1 0 1 1 1 1
1 1 1 1 1 1 1 1