Enhanced Direct Memory Access (eDMA)
MPC5566 Microcontroller Reference Manual, Rev. 2
9-18 Freescale Semiconductor
9.2.2.11 eDMA Set START Bit Register (EDMA_SSBR)
The EDMA_SSBR provides a memory-mapped mechanism to set the START bit in the TCD for a channel.
The data value on a register write sets the START bit in the transfer control descriptor. SSBn is a global
set function that sets all START bits for a channel. Reads of this register return all zeroes.
9.2.2.12 eDMA Clear DONE Status Bit Register (EDMA_CDSBR)
The EDMA_CDSBR provides a simple memory-mapped mechanism to clear the DONE bit in the TCD
of the given channel. The data value on a register write causes the DONE bit in the corresponding transfer
control descriptor to be cleared. Setting bit 1 (CDSBn) provides a global clear function, forcing all DONE
bits to be cleared.
Address: Base + 0x001D Access:User W/O
01234567
R00000000
W
CERR[0:6]
Reset00000000
Figure 9-13. eDMA Clear Error Register (EDMA_CER)
Table 9-11. EDMA_CER Field Descriptions
Field Description
0 Reserved
1–7
CERR[0:6]
Clear error indicator.
0–63 Clear corresponding bit in EDMA_ERH or EDMA_ERL
64–127 Clear all bits in EDMA_ERH or EDMA_ERL
Address: Base + 0x001E Access: User W/O
01234567
R00000000
W
SSB[0:6]
Reset00000000
Figure 9-14. eDMA Set START Bit Register (EDMA_SSBR)
Table 9-12. EDMA_SSBR Field Descriptions
Field Description
0 Reserved
1–7
SSB[0:6]
Set START bit (channel service request).
0–63 Set the corresponding channel’s TCD.START
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