Fast Ethernet Controller (FEC)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 15-5
Throughputs of 200 Mbps in full duplex operations and 100 Mbps in half-duplex operations can be
attained.
15.2.2 Interface Options
The following interface options are supported. A detailed discussion of the interface configurations is
provided in Section 15.4.5, “Network Interface Options”.
15.2.2.1 10 Mbps and 100 Mbps MII Interface
MII is the media independent interface defined by the IEEE® 802.3 standard for 10/100 Mbps operation.
Configure the MAC-PHY interface to operate in MII mode by asserting RCR[MII_MODE].
The speed of operation is determined by the FEC_TX_CLK and FEC_RX_CLK signals which are driven
by the external transceiver. The transceiver auto-negotiates the speed or it is controlled by software via the
serial management interface (FEC_MDC and FEC_MDIO signals) to the transceiver. See the MMFR and
MSCR register descriptions, as well as the section on the MII, for a description of how to read and write
registers in the transceiver using this interface.
15.2.2.2 10 Mpbs 7-Wire Interface Operation
The FEC supports a 7-wire interface as used by many 10 Mbps Ethernet transceivers. The
RCR[MII_MODE] bit controls this functionality. If this bit is deasserted, the MII mode is disabled and the
10 Mbps, 7-wire mode is enabled.
15.2.3 Address Recognition Options
The address options supported are promiscuous, broadcast reject, individual address (hash or exact match),
and multicast hash match. Address recognition options are discussed in detail in Section 15.4.8, “Ethernet
Address Recognition.”
15.2.4 Internal Loopback
Internal loopback mode is selected via RCR[LOOP]. Loopback mode is discussed in detail in
Section 15.4.13, “Internal and External Loopback.”
15.3 Programming Model
This section gives an overview of the registers, followed by a description of the buffers.
The FEC is programmed by a combination of control/status registers (CSRs) and buffer descriptors. The
CSRs are used for mode control and to extract global status information. The descriptors are used to pass
data buffers and related buffer information between the hardware and software.
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