NXP Semiconductors MPC5566 - Data Trace Start Address Registers 1 and 2 (DTSA1 and DTSA2)

Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 25-79
25.17.2.4 Data Trace Start Address Registers 1 and 2 (DTSA1 and DTSA2)
The data trace start address registers define the start addresses for each trace channel.
Table 25-50. DTC Field Description
Bit Description
31–30
RWT1
Read/write trace 1
00 No trace messages generated
X1 Enable data read trace
1X Enable data write trace
29–28
RWT2
Read/write trace 2
00 No trace messages generated
X1 Enable data read trace
1X Enable data write trace
27–8 Reserved, read as 0.
7
RC1
Range control 1
0 Condition trace on address within range (endpoints inclusive)
1 Condition trace on address outside of range (endpoints exclusive)
6
RC2
Range control 2
0 Condition trace on address within range (endpoints inclusive)
1 Condition trace on address outside of range (endpoints exclusive)
5–0 Reserved, read as 0.
Access: R/W
313029282726252423222120191817161514131211109876543210
R
DATA TRACE START ADDRESS
W
Reset00000000000000000000000000000000
Figure 25-59. Data Trace Start Address Registers (DTSA1, DTSA2)