NXP Semiconductors MPC5566 - Pulse and Edge Counting Mode (PEC)

Enhanced Modular Input/Output Subsystem (eMIOS)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 17-39
Figure 17-26. Pulse/Edge Accumulation Single-shot Mode Example
17.4.4.4.8 Pulse and Edge Counting Mode (PEC)
The following table lists the pulse and edge counting mode settings:
The PEC mode returns the amount of pulses or edges detected on the input for a desired time window.
MODE[6] bit selects between continuous or single shot operation.
Triggering of the internal counter is done by a rising- or falling-edge or both edges on the input signal. The
polarity and the triggering edge is selected by EDSEL and EDPOL bits in EMIOS_CCRn.
Register A1 holds the start time and register B1 holds the stop time for the time window. After writing to
register A1, when a match occur between comparator A and the selected timebase, the internal counter is
cleared and it is ready to start counting input events. When the time base matches comparator B1, the
Table 17-21. PEC Operating Mode
MODE[0:6] Unified Channel PEC Operating Mode
0b0001010 Pulse and edge counting (continuous)
0b0001011 Pulse and edge counting (single shot)
Selected
counter bus
0x000090 0x000400
Input signal
2
A2 value
4
0x001500
0xxxxxxx 0x000400
0xxxxxxx 0x000090
0xFFFFFF
0x001500
EMIOS_CCNTRn
1
FLAG
set event
MODE[6] = 1
Write to A1 A1 match
A1 value
3
B1 value
Notes:
1
Cleared on the first input event after writing to register A1.
2
After input filter.
0xxxxxxx 0x000090
3
Writing EMIOS_CADRn writes to A1.
B2 value
5
0x000400
Time
Events A1 events
4
Reading EMIOS_CADRn returns the value of A2.
5
Reading EMIOS_CBDRn returns the value of B1.
0x000000
0xxxxxxx 0x001500
Events