NXP Semiconductors MPC5566 - Pad Configuration Register 191 (SIU_PCR191)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-80 Freescale Semiconductor
6.3.1.102 Pad Configuration Register 191 (SIU_PCR191)
The SIU_PCR191 register controls the function, direction, and electrical attributes of
EMIOS[12]_SOUTC_GPIO[191]. Only the output of EMIOS[12] is connected.
Figure 6-103. EMIOS[12]_SOUTC_GPIO[191] Pad Configuration Register (SIU_PCR191)
Refer to Table 6-19 for bit field definitions. Table 6-102 lists the PA fields for
EMIOS[12]_SOUTC_GPIO[191].
6.3.1.103 Pad Configuration Register 192 (SIU_PCR192)
The SIU_PCR192 register controls the function, direction, and electrical attributes of
EMIOS[13]_SOUTD_GPIO[192]. Only the output of EMIOS[13] is connected.
Figure 6-104. EMIOS[13]_SOUTD_GPIO[192] Pad Configuration Register (SIU_PCR192)
Address: Base + 0x01BE Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for GPIO[191] when configured as an output.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for GPIO[191] when configured as an input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[12] pin is determined by the WKPCFG pin.
Table 6-102. PCR191 PA Field Definitions
PA Field Pin Function
0b00 GPIO[191]
0b01 EMIOS[12]
0b10 SOUTC
0b11 EMIOS[12]
Address: Base + 0x01C0 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to 1 for GPIO[192] when configured as an output.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for GPIO[192] when configured as an input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[13] pin is determined by the WKPCFG pin.