System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-92 Freescale Semiconductor
6.3.1.121 Pad Configuration Register 214 (SIU_PCR214)
The SIU_PCR214 register enables or disables ENGCLK and controls the drive strength. ENGCLK is
enabled or disabled by setting or clearing the OBE bit. ENGCLK is enabled during reset.
Figure 6-122. ENGLCK Pad Configuration Register (SIU_PCR214)
6.3.1.122 Pad Configuration Register 215 (SIU_PCR215)
The SIU_PCR215 register controls the function, direction, and electrical attributes of
AN[12]_MA[0]_SDS.
Figure 6-123. AN[12]_MA[0]_SDS Pad Configuration Register (SIU_PCR215)
Refer to Table 6-19 for bit field definitions. Table 6-119 lists the PA fields for AN[12]_MA[0]_SDS.
Table 6-118. PCR213 PA Field Definitions
PA Field Pin Function
0b0 GPIO
0b1 WKPCFG
Address: Base + 0x01EC Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0
OBE
0
DSC
0 0 0 0 0 0
W
RESET: 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 0
Address: Base + 0x01EE Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA
1,
2
1
Enable or disable input and output buffers based on the PA selection. Output buffers are disabled for the AN[12] function.
Output buffers can be enabled only for MA[0] or SDS functions.
2
To select the SDS function, set the PA field to 0b00.
0 0 0 0
ODE
0
SRC
0 0
W
RESET: 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0
Table 6-119. PCR215 PA Field Definitions
PA Field Pin Function
0b00 SDS
0b01 Invalid value
0b10 MA[0]
0b11 AN[12]