NXP Semiconductors MPC5566 - Pad Configuration Register 196 (SIU_PCR196)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-83
Refer to Table 6-19 for bit field definitions. Table 6-106 lists the PA fields for
EMIOS[16]_ETPUB[0]_GPIO[195].
6.3.1.107 Pad Configuration Register 196 (SIU_PCR196)
The SIU_PCR196 register controls the function, direction, and electrical attributes of
EMIOS[17]_ETPUB[1]_GPIO[196]. Both the input and output functions of EMIOS[17] are connected.
Only the output channels of ETPUB[1] is connected.
Figure 6-108. EMIOS[17]_ETPUB[1]_GPIO[196]
Pad Configuration Register (SIU_PCR196)
Refer to Table 6-19 for bit field definitions. Table 6-107 lists the PA fields for
EMIOS[17]_ETPUB[1]_GPIO[196].
Table 6-106. PCR195 PA Field Definitions
PA Field Pin Function
0b00 GPIO[195]
0b01 EMIOS[16]
0b10 ETPUB[0]
0b11 EMIOS[16]
Address: Base + 0x01C8 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
The OBE bit must be set to one for EMIOS[17] and GPIO[196] when configured as outputs.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[17] or GPIO[196] when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
3
3
The weak pullup/down selection at reset for the EMIOS[17] pin is determined by the WKPCFG pin.
Table 6-107. PCR196 PA Field Definitions
PA Field Pin Function
0b00 GPIO[196]
0b01 EMIOS[17]
0b10 ETPUB[1]
0b11 EMIOS[17]