NXP Semiconductors MPC5566 - Output Pulse-Width Modulation Mode (OPWM)

Enhanced Modular Input/Output Subsystem (eMIOS)
MPC5566 Microcontroller Reference Manual, Rev. 2
17-54 Freescale Semiconductor
Figure 17-37 shows the unified channel in OPWMC with trailing dead-time.
Figure 17-37. Output PWMC with Trailing Dead-time Insertion
17.4.4.4.14 Output Pulse-Width Modulation Mode (OPWM)
The following table lists the output width modulation mode settings:
Table 17-27. OPWM Operating Modes
MODE[0:6] Unified Channel OPWM Operating Mode
0b0100000 Output pulse-width modulation. FLAG set at match of internal counter and
comparator B, immediate update.
0b0100001 Output pulse-width modulation. FLAG set at match of internal counter and
comparator B, next period update.
0b0100010 Output pulse-width modulation. FLAG set at match of internal counter and
comparator A or comparator B, immediate update.
0b0100011 Output pulse-width modulation. FLAG set at match of internal counter and
comparator A or comparator B, next period update.
Output
flip-flop
A1 match A1 match
Time
0x000000
0x000303
0x000200
Update to
A1
Selected
MODE[6] = 0
counter bus
A1 match
Notes:
1
Writing EMIOS_An writes to A2.
2
Writing EMIOS_Bn writes to B1.
A2 value transferred to A1 according to OUn bit.
B2 value transferred to B1 according to OUn bit.
Update to
A1
A1 match
A1 value
1
0x0002000x0002000x000200
Update to
B1 B1 match
0x000010
0x000000
B1 value
2
0x000010
Time
B1 match
0x000303 0x000303
0x000303
0xxxxxxx
EMIOS_CCNTR