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NXP Semiconductors MPC5566 - Page 732

NXP Semiconductors MPC5566
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Enhanced Modular Input/Output Subsystem (eMIOS)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 17-53
Figure 17-36 and Figure 17-37 show the unified channel running in OPWMC with leading and trailing
dead-time, respectively.
Figure 17-36. Output PWMC with Leading Dead-time Insertion
Output
flip-flop
A1 match A1 match
Time
0x000000
0x000303
0x000200
Update to
A1
Selected
MODE[6] = 1
counter bus
A1 match
Notes:
1
Writing EMIOS_An writes to A1.
2
Writing EMIOS_Bn writes to B1.
A2 value transferred to A1 according to OUn bit.
B2 value transferred to B1 according to OUn bit.
Update to
A1
A1 match
A1 value
1
0x0002000x000200
0x000303 0x000303
0x000200
0x000303
0xxxxxxx
Update to
B1
B1 match
0x000010
0x000000
B1
match
B1 value
2
0x000010
Time
EMIOS_CCNTR

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