NXP Semiconductors MPC5566 - Reset Status Register (SIU_RSR)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-11
6.3.1.2 Reset Status Register (SIU_RSR)
The SIU_RSR contains the sources of the most recent reset, and the state of the configuration pins at reset.
Except for a POR request or a software external reset, all reset requests, regardless of priority, are not
serviced until the current reset completes.
This register contains one reset status bit for each of the following reset sources:
• Power-on reset (POR)
• External reset
• Software system reset
• Software external reset
• Watchdog reset
• Loss-of-lock reset
• Loss-of-clock reset
• Checkstop reset
A reset status bit set to 1 indicates a reset request by that source. After the reset status bits are set, they
remain set until another reset occurs. Simultaneous reset requests are prioritized. When reset requests with
different priorities occur on the same clock cycle, the reset request with the highest priority is serviced and
the status bit of only that reset request is set.
The following table lists the reset sources and arbitration priorities:
24–27
MASKNUM_MAJOR
[0:3]
Major revision number of MCU mask. Read-only, mask programmed mask number of the
MCU. Reads 0x0 for the initial mask set of the device, and changes sequentially for each
mask set.
28–31
MASKNUM_MINOR
[0:3]
Minor revision number of MCU mask. Read-only, mask programmed mask number of the
MCU. Reads 0x0 for the initial mask set of the device, and changes sequentially for each
mask set.
Table 6-7. Reset Source Priorities
Reset Source Priority Group
• Power on reset (POR)
• External reset
Highest 0
• Software system reset Higher 1
• Loss-of-clock
• Loss-of-lock
• Watchdog
• Checkstop
Lower 2
• Software external reset Lowest 3
Table 6-6. SIU_MIDR Field Descriptions
Field Description