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NXP Semiconductors MPC5566 - Programmable MCKO Frequency

NXP Semiconductors MPC5566
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Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
25-12 Freescale Semiconductor
25.4.3 Programmable MCKO Frequency
MCKO is an output clock to the development tools used for the timing of MSEO and MDO pin functions.
MCKO is derived from the system clock, and its frequency is determined by the value of the MCKO_DIV
field in the port configuration register (PCR) located in the NPC. Possible operating frequencies include
one-half, one-quarter, and one-eighth system clock speed.
Table 25-7 shows the MCKO_DIV encodings. In this table, SYS_CLK represents the system clock
frequency. The default value selected if a reserved encoding is programmed is SYS_CLK/2.
25.4.4 Nexus Messaging
Most of the messages transmitted by the NDI include a SRC field. This field is used to identify which
source generated the message. Table 25-8 shows the values used for the SRC field by the different clients
on the device. These 4-bit values are specific to the device. The same values are used for the client select
values written to the client select control register.
25.4.5 System Clock Locked Indication
Following a power-on reset, the lsb of the auxiliary output port pins (MDO0) can be monitored to provide
the lock status of the system clock. MDO0 is driven to a logic 1 until the system clock achieves lock after
Table 25-7. MCKO_DIV Values
MCKO_DIV[2:0] MCKO Frequency
0b000 SYS_CLK
0b001 SYS_CLK / 2
0b010 Reserved
0b011 SYS_CLK / 4
0b100 Reserved
0b101 Reserved
0b110 Reserved
0b111 SYS_CLK / 8
Table 25-8. SRC Packet Encodings
SRC[3:0] Client
0b0000
e200z
6
0b0001 eDMA
0b0011 eTPU2 (ENGINE2_SRC)
0b0100
eTPU CDC
1
(CDC_SRC)
1
CDC is the eTPU Coherent Dual-Parameter Controller. Refer to the eTPU
Reference Manual for more information.
0b0101–0b1111 Reserved

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