e200z6 Core Complex
MPC5566 Microcontroller Reference Manual, Rev. 2
3-20 Freescale Semiconductor
3.3.1.5.4 MAS[3] Register
The MAS[3] register is shown in Figure 3-10.
MAS[3] fields are defined in Table 3-6.
3.3.1.5.5 MAS[4] Register
The MAS[4] register is shown in Figure 3-11.
30
G
Guarded. The e200z6 ignores the guarded attribute because no speculative or out-of-order processing is performed.
0 Access to this page are not guarded, and can be performed before it is known if they are required by the sequential
execution model.
1 All loads and stores to this page are performed without speculation (that is, they are known to be required).
31
E
Endianness. Determines endianness for the corresponding page.
0 The page is accessed in big-endian byte order.
1 The page is accessed in true little-endian byte order.
SPR: 627 Access: R/W
Permission Bits
01234567891011121314151617181920212223242526 27 28 29 30 31
R
RPN
— U0U1U2U3UX SX UWSWURSR
W
Reset Undefined on Power Up ⎯ Unchanged on Reset
Figure 3-10. MMU Assist Register 3 — MAS[3]
Table 3-6. MAS[3] — RPN and Access Control
Field Description
0–19
RPN
Real page number. Only bits that correspond to a page number are valid. Bits that represent offsets within a page
are ignored and must be zero.
20–21 Reserved, must be cleared.
22–25
U0–U3
User bits.
26–31
PERMIS
Permission bits (UX, SX, UW, SW, UR, SR).
SPR: 628 Access: R/W
Default WIMGE values
01 2 3 45678910111213 14 15 1617181920212223242526 272829 30 31
R
— TLBSELD — TIDSELD —TSIZED—
VL
ED
WD ID MD GD ED
W
Reset Undefined on Power Up ⎯ Unchanged on Reset
Figure 3-11. MMU Assist Register 4 MAS[4]
Table 3-5. MAS[2] — EPN and Page Attributes (continued)
Field Description
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