Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 25-67
3. Repeat step 3 in Section 25.14.8.1, “Single Write Access” until the internal CNT value is zero (0).
When this occurs, the DV bit within the RWCS is cleared to indicate the end of the block write
access.
25.14.8.3 Block Write Access (Burst Mode)
1. For a burst block write access, follow Steps 1 and 2 outlined in Section 25.14.8.1, “Single Write
Access” to initialize the registers, using a value of four (doublewords) for the CNT field and a
RWCS[SZ] field indicating 64-bit access.
2. Initialize the burst data buffer (read/write access data register) through the access method outlined
in Section 25.11.11, “ NZ6C3 Register Access via JTAG / OnCE,” using the Nexus register Index
of 0xA (refer to Table 25-24).
3. Repeat step 2 until all doubleword values are written to the buffer.
NOTE
The data values must be shifted in 32-bits at a time lsb first (that is,
doubleword write = two word writes to the RWD).
4. The Nexus module then arbitrates for the system bus and transfer the burst data values from the
data buffer to the system bus beginning from the memory mapped address in the read/write access
address register (RWA). For each access within the burst, the address from the RWA register is
incremented to the next doubleword size (specified in the SZ field) modulo the length of the burst,
and the number from the CNT field is decremented.
5. When the entire burst transfer has completed without error (ERR = 0), NZ6C3 then asserts the
RDY pin, and the DV bit within the RWCS is cleared to indicate the end of the block write access.
NOTE
The actual RWA value as well as the CNT field within the RWCS are not
changed when executing a block write access (burst or non-burst). The
original values can be read by the external development tool at any time.
25.14.8.4 Single Read Access
1. Initialize the read/write access address register (RWA) through the access method outlined in
Section 25.11.11, “ NZ6C3 Register Access via JTAG / OnCE,” using the Nexus register index of
0x9 (refer to Table 25-24). Configure as follows:
– Read Address –> 0xnnnnnnnn (read address)
2. Initialize the read/write access control/status register (RWCS) through the access method outlined
in Section 25.11.11, “ NZ6C3 Register Access via JTAG / OnCE,” using the Nexus register index
of 0x7 (refer to Table 25-24). Configure the bits as follows:
– Access Control RWCS[AC]–> 0b1 (to indicate start access)
– Map Select RWCS[MAP] –> 0b000 (primary memory map)
– Access Priority RWCS[PR] –> 0b00 (lowest priority)
– Read/Write RWCS[RW] –> 0b0 (read access)
– Word Size RWCS[SZ] –> 0b0xx (32-bit, 16-bit, 8-bit)
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