Enhanced Serial Communication Interface (eSCI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 21-21
21.4.4 Transmitter
Figure 21-13 illustrates the features of the eSCI transmitter.
Figure 21-13. eSCI Transmitter Block Diagram
21.4.4.1 Transmitter Character Length
The eSCI transmitter can accommodate either 8-bit or 9-bit data characters. The state of the M bit in eSCI
control register 1 (ESCIx_CR1) determines the length of data characters. When transmitting 9-bit data, bit
T8 in the eSCI data register (ESCIx_DR) is the ninth bit (bit 8).
21.4.4.2 Character Transmission
To transmit data, the MCU writes the data bits to the eSCI data register (ESCIx_DR), which in turn are
transferred to the transmit shift register. The transmit shift register then shifts a frame out through the TXD
signal, after it has prefaced them with a start bit and appended them with a stop bit. The eSCI data register
(ESCIx_DR) is the buffer (write-only during transmit) between the internal data bus and the transmit shift
register.
The eSCI also sets a flag, the transmit data register empty flag (TDRE), every time it transfers data from
the buffer (ESCIx_DR) to the transmit shift register. The transmit driver routine can respond to this flag
by writing another byte to the transmitter buffer (ESCIx_DR), while the shift register is still shifting out
the first byte.
M
TXD
÷16
H 8 7 6 5 4 3 2 1 0 L
11-bit transmit shift register
STOP START
MSB
BAUD divider
Bus
clock
SBR0–SBR12
SBK
Parity
generation
PE
PT
Load from
ESCIx_DR
Shift
enable
Preamble
(All 1s)
Break
(All 0s)
Transmitter control
T8
TE
TIE
TDRE
LOOP Control
TDRE
interrupt
request
TCIE
TC
TC
interrupt
request
RSRC
LOOPS
To
Internal bus
eSCI data registers
RXD
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