System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-45
Refer to Table 6-19 for bit field definitions. Table 6-48 lists the PA field for BB_GPIO[74].
6.3.1.48 Pad Configuration Register 82–75 (SIU_PCR82–SIU_PCR75)
The SIU_PCR82–SIU_PCR75 registers control the function, direction, and electrical attributes of
MDO[11:4]_GPIO[82:75]. GPIO is the default function at reset.
The Full Port Mode (FPM) bit in the Nexus Port Controller (NPC) pad configuration register controls
whether the pins function as MDO[11:4] or GPIO[82:75]. The pad interface port enable is driven by the
NPC block. When the FPM bit is set, the NPC enables the MDO port enable, and disables GPIO. When
the FPM bit is cleared, the NPC disables the MDO port enable, and enables GPIO.
Figure 6-49. MDO[11:4]_GPIO[82:75] Pad Configuration Register (SIU_PCR82–SIU_PCR75)
6.3.1.49 Pad Configuration Register 83 (SIU_PCR83)
The SIU_PCR83 register controls the function, direction, and electrical attributes of
CNTXA_TXDA_GPIO[83].
Figure 6-50. CNTXA_TXDA_GPIO[83] Pad Configuration Register (SIU_PCR83)
Table 6-48. PCR74 PA Field Definition
PA Field Pin Function
0b00 GPIO[74]
0b01 BB
0b10 Invalid value
0b11 Invalid value
Address: Base + (0x00E4–0x00D6) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0
OBE
1
1
This bit applies only to GPIO operation.
IBE
1
DSC ODE
2
2
Clear the ODE bit to 0 for MDO operation.
HYS
3
3
The HYS bit has no effect on MDO operation.
0 0
WPE
4
4
Clear the WPE bit to 0 for MDO operation.
WPS
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0
Address: Base + 0x00E6 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as CNTXA or TXDA, the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
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