Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
25-68 Freescale Semiconductor
– Access Count RWCS[CNT]–> 0x0000 or 0x0001 (single access)
NOTE
Access Count (CNT) of 0x0000 or 0x0001 performs a single access.
3. The NZ6C3 module then arbitrates for the system bus and the read data is transferred from the
system bus to the RWD register. When the transfer is completed without error (ERR = 0), Nexus
asserts the RDY pin and sets the DV bit in the RWCS register. This indicates that the device is
ready for the next access.
4. The data can then be read from the read/write access data register (RWD) through the access
method outlined in Section 25.11.11, “ NZ6C3 Register Access via JTAG / OnCE,” using the
Nexus register index of 0xA (refer to Table 25-24).
NOTE
Only the RDY pin as well as the DV and ERR bits within the RWCS provide
Read/Write Access status to the external development tool.
25.14.8.5 Block Read Access (Non-Burst Mode)
1. For a non-burst block read access, follow Steps 1 and 2 outlined in Section 25.14.8.4, “Single Read
Access” to initialize the registers, but using a value greater than one (0x1) for the CNT field in the
RWCS register.
2. The NZ6C3 module then arbitrates for the system bus and the read data is transferred from the
system bus to the RWD register. When the transfer has completed without error (ERR=0b0), the
address from the RWA register is incremented to the next word size (specified in the SZ field) and
the number from the CNT field is decremented. Nexus then asserts the RDY pin. This indicates
that the device is ready for the next access.
3. The data can then be read from the read/write access data register (RWD) through the access
method outlined in Section 25.11.11, “ NZ6C3 Register Access via JTAG / OnCE,” using the
Nexus register index of 0xA (refer to Table 25-24).
4. Repeat steps 3 and 4 in Section 25.14.8.4, “Single Read Access” until the CNT value is zero (0).
When this occurs, the DV bit within the RWCS is set to indicate the end of the block read access.
25.14.8.6 Block Read Access (Burst Mode)
1. For a burst block read access, follow Steps 1 and 2 outlined in Section 25.14.8.4, “Single Read
Access” to initialize the registers, using a value of four (doublewords) for the CNT field and an
RWCS[SZ] field indicating 64-bit access.
2. The NZ6C3 module then arbitrates for the system bus and the burst read data is transferred from
the system bus to the data buffer (RWD register). For each access within the burst, the address from
the RWA register is incremented to the next doubleword (specified in the SZ field) and the number
from the CNT field is decremented.
3. When the entire burst transfer has completed without error (ERR = 0), Nexus then asserts the RDY
pin and the DV bit within the RWCS is set to indicate the end of the block read access.
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