System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
6-90 Freescale Semiconductor
Refer to Table 6-19 for bit field definitions. Table 6-115 lists the PA fields for
PLLCFG[1]_IRQ[5]_SOUTD_GPIO[209].
6.3.1.118 Pad Configuration Register 210 (SIU_PCR210)
The SIU_PCR210 register controls the function, direction, and electrical attributes of
RSTCFG_GPIO[210].
Figure 6-119. RSTCFG_GPIO[210] Pad Configuration Register (SIU_PCR210)
Refer to Table 6-19 for bit field definitions. Table 6-116 lists the PA fields for RSTCFG_GPIO[210].
Table 6-115. PCR209 PA Field Definitions
PA Field Pin Function
0b000 GPIO[209]
0b001 PLLCFG[1]
0b010 IRQ[5]
0b011 PLLCFG[1]
0b100 SOUTD
Address: Base + 0x01E4 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA
1
1
RSTCFG function is only applicable during reset. The PA bit must be set to 0 for GPIO operation.
OBE
2
2
When configured as GPDO, set the OBE bit to 1.
IBE
3
3
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. When configured as
GPDI, set the IBE bit to 1.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 1
Table 6-116. PCR210 PA Field Definitions
PA Field Pin Function
0b0 GPIO
0b1 RSTCFG
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