NXP Semiconductors MPC5566 - Eqadc CFIFO Transfer Counter Registers 0-5 (Eqadc_Cftcrn)

Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
19-26 Freescale Semiconductor
19.3.2.9 eQADC CFIFO Transfer Counter Registers 0–5 (EQADC_CFTCRn)
The EQADC_CFTCRs record the number of commands transferred from a CFIFO. The EQADC_CFTCR
supports the monitoring of command transfers from a CFIFO.
19.3.2.10 eQADC CFIFO Status Snapshot Registers 0–2 (EQADC_CFSSRn)
The eQADC_CFSSRs contain status fields to track the operation status of each CFIFO and the transfer
counter of the last CFIFO to initiate a command transfer to the internal ADCs and the external command
buffers. EQADC_CFSSR0–1 are related to the on-chip ADC command buffers (buffers 0 and 1) while
EQADC_CFSSR2 is related to the external command buffers (buffers 2 and 3). All fields of a particular
EQADC_CFSSR are captured at the beginning of a command transfer to the buffer associated with that
register.
Note that captured status register values are associated with a previous command transfer. This means that
the eQADC_CFSSR registers capture the status registers before the status registers change, because of the
transfer of the current command that is about to be popped from the CFIFO. The EQADC_CFSSRs are
read only. Writing to the EQADC_CFSSRs has no effect.
Address: EQADC_BASE + 0x0090 (EQADC_CFTCR0)
EQADC_BASE + 0x0092 (EQADC_CFTCR1)
EQADC_BASE + 0x0094 (EQADC_CFTCR2)
EQADC_BASE + 0x0096 (EQADC_CFTCR3)
EQADC_BASE + 0x0098 (EQADC_CFTCR4)
EQADC_BASE + 0x009A (EQADC_CFTCR5)
Access: R/W
0123456789101112131415
R00000
TC_CFn
W
Reset0000000000000000
Figure 19-10. eQADC CFIFO Transfer Counter Registers (EQADC_CFTCRn)
Table 19-13. EQADC_CFTCRn Field Descriptions
Field Description
0–4 Reserved.
5–15
TC_CFn
[0:10]
Transfer counter for CFIFOn. TC_CFn counts the number of commands that have been completely transferred from
CFIFOn. TC_CFn=2, for example, signifies that two commands have been transferred. The transfer of entries bound
for the on-chip ADCs is considered completed when they are stored in the appropriate command buffer. The transfer
of entries bound for an external device is considered completed when the serial transmission of the entry is
completed. The eQADC increments the TC_CFn value by 1 after a command is transferred. TC_CFn resets to 0 after
eQADC completes transferring a command with an asserted EOQ bit. Writing any value to TC_CFn sets the counter
to that written value.
Note: If CFIFOn is in the TRIGGERED state when its MODEn field is programmed to disabled, the exact number of
entries transferred from the CFIFO until that point (TC_CFn) is only known after the CFIFO status changes to
IDLE, as indicated by CFSn. For details refer to Section 19.4.3.5.1, “Disabled Mode.”