NXP Semiconductors MPC5566 - Register Descriptions

Deserial Serial Peripheral Interface (DSPI)
MPC5566 Microcontroller Reference Manual, Rev. 2
20-8 Freescale Semiconductor
20.3.2 Register Descriptions
20.3.2.1 DSPI Module Configuration Register (DSPIx_MCR)
The DSPIx_MCR contains bits that configure the DSPI operation. The values of the HALT and MDIS bits
can be changed at any time, but the effect begins on the next frame boundary. The HALT and MDIS bits
in the DSPIx_MCR are the only bit values software can change while the DSPI is running.
Base + 0x0010 DSPIx_CTAR1 DSPI clock and transfer attributes register 1 32
Base + 0x0014 DSPIx_CTAR2 DSPI clock and transfer attributes register 2 32
Base + 0x0018 DSPIx_CTAR3 DSPI clock and transfer attributes register 3 32
Base + 0x001C DSPIx_CTAR4 DSPI clock and transfer attributes register 4 32
Base + 0x0020 DSPIx_CTAR5 DSPI clock and transfer attributes register 5 32
Base + 0x0024 DSPIx_CTAR6 DSPI clock and transfer attributes register 6 32
Base + 0x0028 DSPIx_CTAR7 DSPI clock and transfer attributes register 7 32
Base + 0x002C DSPIx_SR DSPI status register 32
Base + 0x0030 DSPIx_RSER DSPI DMA/interrupt request select and enable register 32
Base + 0x0034 DSPIx_PUSHR DSPI push TX FIFO register 32
Base + 0x0038 DSPIx_POPR DSPI pop RX FIFO register 32
Base + 0x003C DSPIx_TXFR0 DSPI transmit FIFO register 0 32
Base + 0x0040 DSPIx_TXFR1 DSPI transmit FIFO register 1 32
Base + 0x0044 DSPIx_TXFR2 DSPI transmit FIFO register 2 32
Base + 0x0048 DSPIx_TXFR3 DSPI transmit FIFO register 3 32
Base + 0x004C–0x0078 — Reserved —
Base + 0x007C DSPIx_RXFR0 DSPI receive FIFO register 0 32
Base + 0x0080 DSPIx_RXFR1 DSPI receive FIFO register 1 32
Base + 0x0084 DSPIx_RXFR2 DSPI receive FIFO register 2 32
Base + 0x0088 DSPIx_RXFR3 DSPI receive FIFO register 3 32
Base + 0x008C–0x00B8 — Reserved —
Base + 0x00BC DSPIx_DSICR DSPI DSI configuration register 32
Base + 0x00C0 DSPIx_SDR DSPI DSI serialization data register 32
Base + 0x00C4 DSPIx_ASDR DSPI DSI alternate serialization data register 32
Base + 0x00C8 DSPIx_COMPR DSPI DSI transmit comparison register 32
Base + 0x00CC DSPIx_DDR DSPI DSI deserialization data register 32
Table 20-2. DSPI Detailed Memory Map (continued)
Address Register Name Register Description Bits