NXP Semiconductors MPC5566 - GPIO Pin Data Input Registers 0-213 (Siu_Gpdin)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-107
Writes to the SIU_GPDOn registers have no effect when a primary or alternate function is assigned.
Table 6-147 describes the PDOn bit field in the general purpose data output registers:
6.3.1.160 GPIO Pin Data Input Registers 0–213 (SIU_GPDIn)
The 8-bit read-only SIU_GPDIn registers defined in Figure 6-160 each specify the input state for the
function assigned to the GPDI[n] pin. The n notation in the214 SIU_GPDIn register names relate to the
[n] in GPIO[n] signal name. For example, SIU_GPDI0 contains the PDI0 bit for CS[0]_GPIO[0]; and
SIU_GPDI213 contains the PDI213 bit for WKPCFG_GPIO[213]. The GPDI address for a particular pin
is the GPIO number plus an offset of SIU_BASE + 0x0800. Gaps exist in the memory where GPIO pins
are not implemented in the package.
Software reads the SIU_GPDIn registers to get the input state of the external GPIO pin. Each GPDI
register contains the input state of one external GPIO pin. If a GPDI register is configured as output, and
the input buffer enable bit is set to one in the PCR register, the SIU_GPDIn register reflects the state of the
output pin.
Address: SIU_BASE + 0x0600 R/W
01234567
R00000000
W PDOn
Reset00000000
Figure 6-159. General Purpose Data Output (GPDO) Registers 0–213 (SIU_GPDOn)
Table 6-147. SIU_GPDOn Field Descriptions
Name Description
PDOn Pin data out. Stores the data to drive out the external GPIO. If the register is read,
it returns the value written.
0V
OL
is driven on the external GPIO pin when the pin is configured as an output.
1V
OH
is driven on the external GPIO pin when the pin is configured as an output.
Address: SIU_BASE + 0x0800 R/O
01234567
R0000000PDIn
W
Reset00000000
Figure 6-160. General Purpose Data Input (GPDI) Registers 0–213 (SIU_GPDIn)