Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 19-111
Step Two: Configure the eDMA to handle data transfers between the command/result queues in RAM and
the CFIFOs/RFIFOs in the eQADC.
1. For transferring, set the source address of the eDMA TCDn to point to the start address of
command queue 1. Set the destination address of the eDMA to point to EQADC_CFPR1. Refer to
Section 19.3.2.4, “eQADC CFIFO Push Registers 0–5 (EQADC_CFPRn).”
2. For receiving, set the source address of the eDMA TCDn to point to EQADC_RFPR3. Refer to
Section 19.3.2.5, “eQADC Result FIFO Pop Registers 0–5 (EQADC_RFPRn).” Set the destination
address of the eDMA to point to the starting address of result queue 1.
Table 19-57. Example of Command Queue Commands
1
1
Fields LST, TSR, FMT, and CHANNEL_NUMBER are not shown for clarity. Refer to Section , “Conversion Command Message
Format for On-Chip ADC Operation,” for details.
012 345678910111213141516171819202122232425262728293031
EOQ
PAU SE
RESERVED
ABORT_ST
EB (0b1)
BN
CAL
MESSAGE_
TAG
ADC COMMAND
CMD1 0 0
0 0 0 1 0 0b0011 Conversion command
CMD2 0 0
0 0 0 1 0 0b0011 Conversion command
CMD3 0 0
0 0 0 1 0 0b0011 Conversion command
CMD4 0 1
0 0 0 1 0 0b0011
2
2
MESSAGE_TAG field is only defined for read configuration commands.
Configure peripheral device for next conversion sequence
CMD5 0 0
0 0 0 1 0 0b0011 Conversion command
CMD6 0 0
0 0 0 1 0 0b0011 Conversion command
CMD7 0 0
0 0 0 1 0 0b0011 Conversion command
CMD8 0 1
0 0 0 1 0 0b0011
2
Configure peripheral device for next conversion sequence
etc............
CMDEOQ 1 0 0 0 0 1 0 0b0011 EOQ message
CFIFO header ADC command
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