Enhanced Modular Input/Output Subsystem (eMIOS)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 17-45
The MC mode can provide a time base for a counter bus or a general purpose timer.
MODE[6] bit selects internal or external clock source when cleared or set, respectively. When external
clock is selected, the input signal pin is used as the source and the triggering polarity edge is selected by
the EDPOL and EDSEL in the EMIOS_CCRn.
When software selects the modulus counter mode, the internal counter is initially reset to 0. The internal
counter counts up from the current value until it matches the value in register A1. Register B1 is cleared
and is not accessible to the MCU. MODE[4] bit selects up mode or up/down mode, when cleared or set,
respectively.
When in up count mode, a match between the internal counter and register A1 sets the FLAG and clears
the internal counter.
When in up/down count mode, a match between the internal counter and register A1 sets the FLAG and
changes the counter direction from increment to decrement. A match between register B1 and the internal
counter changes the counter direction from decrement to increment and sets the FLAG only if MODE[5]
bit is set.
NOTE
The FORCMA and FORCMB bits have no effect when the unified channel
is configured for MC mode.
NOTE
Any update to the A register takes place immediately, regardless of the
current state of the counter and whether the counter is in up mode, or
up/down mode.
0b0010110 Modulus counter. Up/down counter, change in counter direction upon
match of input counter and register B1 and sets the FLAG, internal clock
source.
0b0010111 Modulus counter. Up/down counter, change in counter direction upon
match of input counter and register B1 and sets the FLAG, external clock
source.
Table 17-23. Modulus Counter Operating Modes (continued)
MODE[0:6] Unified Channel MC Operating Mode
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