NXP Semiconductors MPC5566 - Page 1079

Voltage Regulator Controller (VRC) and POR Module
MPC5566 Microcontroller Reference Manual, Rev. 2
23-6 Freescale Semiconductor
• When powering up, power sequencing is not required between V
RC33
and V
DDSYN
. However, for
the VRC staged turn-on to operate within specification, V
RC33
must not lead V
DDSYN
by more than
600 mV, nor lag by more than 100 mV. Higher spikes in the emitter current of the pass transistor
occur if V
RC33
leads or lags V
DDSYN
by exceeding these tolerances. The value of the current for
the higher spikes depends on the board power supply circuitry and the amount of board-level
capacitance.
• When powering down, delta tolerances between V
RC33
and V
DDSYN
are not required because the
bypass capacitors internal and external to the device are already charged.
• When not powering up or down, delta tolerances between V
RC33
and V
DDSYN
are not required for
the VRC to operate within specification.
23.5.3.1 Power-Up Sequence If V
RC33
Grounded
The 1.5 V V
DD
supply must rise to 1.35 V before the 3.3 V V
DDSYN
and the RESET supplies rise above
2.0 V. This ensures that digital logic in the PLL for the 1.5 V supply does not begin to operate below the
lower limit of the 1.35 V operation range. Because the internal 1.5 V POR is disabled, the internal 3.3 V
POR or the RESET power POR must hold the device in reset. Since they can negate as low as 2.0 V, V
DD
must be within the specification range before the 3.3 V POR and the RESET power POR negate.
Figure 23-4. Power-Up Sequence, V
RC33
Grounded
23.5.3.2 Power-Down Sequence If V
RC33
Grounded
The only requirement for the power-down sequence when V
RC33
is grounded is that if V
DD
decreases to
less than its operating range, V
DDSYN
or the RESET power must decrease to less than 2.0 V before the
V
DD
power is allowed to increase to its operating range. This ensures that the digital 1.5 V logic, which is
reset by the ORed POR only that can cause the 1.5 V supply to decrease below its specification, is reset
correctly.
1.35V
2.0V
V
DDSYN
and RESET power
V
DD
NOTE: V
DD
must reach 1.35 V before V
DDSYN
and RESET reach 2.0 V.